Technical Data

• two 20 MHz 15-bit timers
• settable output pulse width: 400 ns - 1600 s (for the clock frequency of 10 MHz)
• time resolution: 15 bit (12 bit mantissa + 3 bit exponent)
• trigger: hardware / software
• active signal slope: rising / falling (computer controlled)
• allowable rise and fall time on the trigger input: < 100 ns/V
• output signal: positive and negative pulses
• pulse width on the trigger input: > 15 ns
• clock frequency: < 20 MHz
• connectors: 50 Ohm LEMO sockets
• input and output signal level: TTL / 5V-CMOS
• input impedance: 47 kOhm + switchable 50 Ohm pull-up resistors
• maximal output current: 100 mA